Zero suppressor for IC17106 Schematic Circuit Diagram
Eliminating Superfluous Zeros in ICL7106 Displays
Many individuals find the leading zero before a number, as seen in a liquid crystal (LC) display, unnecessary and bothersome. For them, ‘1’ is more straightforward than ‘001’. In systems utilizing the ICL7106 display, this annoyance can be resolved through the method described here.
Controlling Backplane and Segment of ICL7106
In the ICL7106 setup, both the backplane (BP) and the segment are controlled by a rectangular signal. When the segment is active, the drive signals are in antiphase, illuminating the segment. Conversely, when the segment is inactive, the display remains unlit because the drive signals are in phase.
Simplifying the Suppression of Leading Zeros
To remove unnecessary zeros, the process involves locating these zeros and altering the signal that drives the segment. This adjustment ensures a clearer display without superfluous leading zeros.
Understanding the 3 1/2 Digit Display
A 3 1/2 digit display comprises three complete digits numbered 1, 2, and 3. The fourth (half) digit is controlled through output AB and can only display ‘1’, providing a concise representation of the numeric value.
Detecting Leading Zeros in Digit 3
To ascertain whether digit 3 displays a leading zero, a simple check can be performed. If digit 4 is inactive (AB is off), and segment g of digit 3 is off while segment e is on, a leading zero is present on the display. In such situations, the drive signal to the segments for digit 3 can be inverted using XNOR gates, causing the leading zero to disappear.
Evaluating Digit 2 for Leading Zeros
Determining the presence of a leading zero in digit 2 requires verifying that digit 3 is inactive and observing whether a ‘0’ is displayed on digit 2. This condition can be determined by examining the states of segments e and g. If a leading zero is detected, the drive signals for digit 2 should be inverted accordingly.
Buffering Test Output with Opamp IC 9a
Opamp IC 9a plays a crucial role by buffering the level of the test output. This buffered output can then serve as the common ground level for all connected circuits, ensuring proper functioning and coordination among the components.