# 4-bit Random Generator Schematic Circuit Diagram

**Creating a Pseudo-Random Generator**

Utilizing a Type 4006 quadruple shift register, IC1, the generator is constructed. Among the shift registers, two are four bits long, while the other two consist of five bits, summing up to 18 bits in total. Although the clock is common to the registers, all inputs and outputs are distinct. From the four-bit registers, only the fourth bit is accessible as an output, while in the case of the five-bit ones, the fourth and fifth bits are available.

**Implementing Feedback for Random Sequences**

By feeding back the outputs of the four registers to the inputs, a (pseudo) random generator is achieved. The outputs of the four XNOR gates serve as the generator’s outputs. The unique feature of this design is that the four bits not only create a random sequence of numbers but also each possesses a different pattern. This contrasts with the shift register itself, where levels shift from one output to another. Consequently, this generator can produce random four-bit numbers or four independent random digital signals. The accompanying BASIC program in Fig. 2 facilitates simulating the operation of the shift register.

**Defining Register Length and Output Bits**

In line 140, the register’s length (MAX) and the number of output bits (BMAX) are specified. Line 150 initializes all bits of the ‘shift register’ (array A) to zero. If, as is often the case, a random starting state is desired, this line will need to be modified.

**Understanding XNOR Functions and Connections**

Lines 190-220 outline the XNOR functions. Any alterations in the connections of these gates should be clearly indicated in this section. If changes are made, it might be necessary to modify lines 290 and 300 accordingly. The program comprises only 390 steps, filling the monitor screen, out of the 218 = 262,144 possible steps.

In the diagram, a clock generator in the form of a Schmitt trigger (IC3a) has been added. It is, however, possible to use any suitable clock at the clock input.