Audio Circuit Diagrams

Audio Equalizer Circuit

The Audio Equalizer is employed to modify the pitch of a melody without sacrificing any of its inherent characteristics. Various aspects of the signal may undergo alterations over time. For instance, the melody generated by the melody generator IC can experience delays, and the pitch of the melody can be adjusted at different instances. This process can result in a diverse array of musical sounds stemming from a single melody.

The term ‘modulation’ is employed to signify the alteration of the melody, which includes introducing delays and other effects.

Outline

  • Circuit Diagram of Audio Equalizer Circuit:
    • Components Description:
    • Working of Audio Equalizer Circuit:

Circuit Diagram of Audio Equalizer Circuit:

Audio Equalizer

Components Used in this Circuit:

  • IC
    • IC1, IC2(4046) – 2
    • IC3(NE555) – 1
    • IC4(CD4051) – 1
  • ResistorC1,C2(4.7uf) – 2
    • R1,R3(2.2K) – 2
    • R2,R4(220K) – 2
    • R5,R6(10K) – 2
    • R7(56K) – 1
    • VR1(10K) – 1
    • VR2(5K) – 1
  •  
  • C3(470uf) – 1
  • C4(.1uf) – 1
  • D1(1N4148) – 1
  • T1(SL100) – 1
  • UM66 – 1
  • Speaker – 1

Components Description:

1. Phase Locked Loop (for Voltage Controlled Oscillator):

The Phase Locked Loop (PLL) IC is connected to two 220K ohm resistors (R2 and R4) at pin number 12. These resistors primarily contribute to offset adjustments. A higher value for either R2 or R4 indicates a smaller offset. To avoid complete silence when the input is at 0V, the R2 resistor fine-tunes the frequency range.

The frequency at the output from the Voltage Controlled Oscillator (VCO) at pin 4, when the voltage at pin 9 is half of the supplied voltage, can be calculated as follows:

f = 1 / (R1 * C1) = 1 / (2.2K * 4.7u) = 96.71 Hz.

The frequency changes in response to variations in the voltage applied to the VCO’s input, and this alteration is controlled by a potentiometer.

2. 555 Timer: This IC works like a astable multivibrator.

The on-time duration is determined by the product of R5 and C3, which amounts to 47 milliseconds (10Kohm * 470pF).

Similarly, the off-time period is 4.7 milliseconds as calculated from R6 multiplied by C3.

During the off-time phase, a diode is strategically connected to prevent the current path when the capacitor is discharging. The fundamental objective is to maintain consistent on and off durations, constituting 50 percent of the duty cycle. To eliminate any potential circuit noise, a capacitor C4 with a value of 0.1uF is incorporated, although its online presence is not mandatory.

The output from the 555 timer serves as a selection signal for the multiplexer, which combines the outputs of both Voltage Controlled Oscillators (VCOs).

3. Multiplexer:

The CD4051 functions as a 2.1 multiplexer, where both VCO outputs are connected as inputs to MUX pins 13 and 14. A selection line is employed to alternate between the outputs from these PLLs, synchronizing them over the same duration. By incorporating a few additional VCOs and multiplexing their outputs, various audio effects can be introduced into the sound, and the speaker reproduces it as the output. On the market, you can find various UM66T types, each producing distinct tones. For instance, UM66T01 generates melodies like “Jingle Bells,” “We Wish You a Merry Christmas,” and “Santa Claus is Coming to Town.” You can replace the UM66 with any other melody in the circuit above to alter the tunes as desired.

Working of Audio Equalizer Circuit:

The circuit employs the IC UM66 to modify the melody generated by the melody generator. When a constant voltage is applied, oscillation is generated by the Voltage Controlled Oscillator (VCO). To achieve this, the Phase-Locked Loop IC, denoted as IC1 and IC2 in the circuit, is used. The PLL chip encompasses both a VCO and a Phase Comparator.

The voltage supplied to the VCOs can be adjusted using potentiometers, where the circuit incorporates both a 5K and a 10K potentiometer to modify the VCO input voltage. IC1 and IC2 are responsible for capturing this voltage. A CD4051 multiplexer IC sequentially switches between the VCO outputs, connected to pin 4 of IC CD4046 (labeled as IC4 in the circuit diagram).

A 555 timer (IC3) serves as an astable multivibrator to generate the signal for the multiplexer. Each high and low pulse generated by the 555 timer lasts for 4.7 seconds. The use of a small-signal diode like the IN4148 ensures a 50% duty cycle. The output from the 555 timer is then routed to an NPN transistor.

The melody generator UM66 (or any other IC for melody generation) receives its input from the collector terminal. The output of the melody generator is connected to one terminal of a 4 ohm speaker (SP), with the other terminal of the speaker connected to a 5-volt power supply.

By making minor adjustments to the potentiometer positions, the same music can be heard with various tones, pitches, and heights. Additionally, replacing the UM66 with an alternative melody IC in the circuit can yield a variety of different tunes.

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