# Bias Compensation For Opamps Schematic Circuit Diagram

#### Lower Input Noise Level of Bipolar Opamps

Bipolar opamps offer an advantage over FET types due to their significantly lower input noise levels. However, in high-impedance circuits, the bias current of a bipolar opamp can pose challenges. For example, the well-known NE5534 opamp has a typical bias current of 0.5 μA with a variation of about 5 nA per degree Celsius. Temperature fluctuations of ±10 degrees Celsius would cause current changes of nearly 100%, making it impossible to maintain the output voltage at zero volts DC.

#### Bias Current Compensation and Stable Input Impedance

The presented circuit compensates for the bias current by incorporating a current source. Its design ensures a high input impedance. While the current source may not be entirely stable with temperature variations, this issue is effectively mitigated by integrating it into the control loop.

#### Implementing Noise-Resistant Current Source

A current source, T2, is linked to the non-inverting input of IC1 through a 10 MΩ resistor. The reference voltage for T2 is established by an auxiliary current source, T1, and D1. This setup ensures minimal impact from supply line noise on the circuit. To minimize T2’s noise, D1’s reference voltage is divided by R2-P1.

#### Voltage Regulation and Bias Compensation

Opamp IC3 monitors the direct voltage at the output of IC1 and adjusts the current source through R3 to maintain a zero voltage output at IC1. Consequently, IC1 cannot function as a DC amplifier due to this regulation.

#### Introducing Capacitor C2 for Bias Compensation

To prevent bias compensation interference from the preceding stage’s output resistance or offset, a capacitor, C2, is essential at the input. Despite the high input impedance, the capacitor should not have a small value. For a 20 Hz cutoff frequency and 25 MΩ input impedance, a 330 pF capacitor would suffice. However, a high reactance at such a small capacitor value would introduce a noise level of about 640 nV Hz^(-1/2) at 20 Hz. To counter this, the capacitor’s reactance must match the output impedance of the preceding signal source.

#### Precise Adjustment with Preset P1

Preset P1 needs calibration to set IC2’s output voltage close to zero. Especially at an ambient temperature corresponding to the center of the desired temperature range. This adjustment ensures accurate functioning within the specified temperature range.

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