At high currents, many silicon diode has a forward voltage of 1 V or more. There are types whose drop at currents of up to 2-3 A is limited to 0.5-0.6 V, but even that may cause unacceptably high losses. The circuit described here offers a possible remedy.
The cathode, C, of T1, a SIPMOS FET. is connected to a sinusoidal-voltage source. The anode, A, thus functions as a reference point. Capacitor C1 is charged to the peak value of the sinusoidal voltage, Us viaD1. This ensures that the opamp is provided with power even during the negative half-periods of Us.
The non-inverting input of IC1 is set to half the peak value of Us via potential divider R1-P1-R3. Because of voltage divider R2-R4, the potential at the inverting input of the opamp will be higher than that at the non-inverting input only during the positive half-periods of Us. This means that the drain-source channel of Ti is switched on by the opamp when the voltage at the cathode tends to become lower than that at the anode. In that case, the current through the FET flows from source to drain, parallel to the internal protection diode. In other words, the FET is used the wrong way round. The forward voltage of the FET diode so created is the product of the current through it and the resistance (0.07 Ω).
The setting of preset P1 determines the anode-cathode potential at which the output voltage of the (mainly) linearly operating opamp begins to rise and thus drive T1 into conduction. The preset can be adjusted accurately only with the aid of an oscilloscope connected to the drain and source of the FET. It is set to that position where for the nominal forward current the voltage across T1 is as small as possible during the half-periods when the FET is on. In the prototype, the forward voltage so measured was 0.5 V with an alternating current of 10 A at a frequency of 50 Hz. At 3.3 A. the drop was only 0.2 V and at 300 mA just 0.1 V. Note that the forward voltage remains constant with currents below the level at which P1 was set.
The circuit draws a current that is not much higher than the supply current to IC1. Although the maximum supply voltage of the opamp is 36 V, the cathode-anode voltage. that is, the ‘reverse’ voltage of the diode must not exceed 20 V. which is the maximum permissible gate-source voltage of the BUZ10.