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MHz Oscillator using an ATtiny15 Schematic Circuit Diagram

Most engineers will recognize the problem: Your circuit needs a stable 1 or 2 MHz clock generator (in the author’s case it was for a Pong game using an old AY3-8500). A suitable crystal is not to hand so you cobble together an RC oscillator (there are plenty of circuits for such a design). Now it turns out that you don’t have exactly the right capacitor so a preset pot is added to allow some adjustment. Before you know it the clock circuit is taking up more space on the board than you had hoped. Providing the application does not demand a precise clock source a tiny 8-pin microcontroller may offer a better solution to the problem. It needs no additional external components and an old ATtiny15 can be found quite cheaply. Another advantage of the solution is that clock frequency adjustment does not involve changing external components and is not subject to component tolerances.

MHz Oscillator using an ATtiny15 Schematic Circuit Diagram

The microcontroller’s internal RC oscillator is already accurately calibrated to 1.6 MHz. With its inbuilt PLL, internal Timer 1 can achieve up to 25.6 MHz [2]. By configuring internal dividers the timer can output a frequency in a range of roughly 50 kHz up to 12 MHz from an output pin. The difference between calculated and the actual output frequency increases at higher frequencies. A meaningful upper limit of about 2 MHz is a practical value and even at this frequency, the deviation from the calculated value is about 15 %. The circuit diagram could hardly be simpler, aside from the power supply connections the output signal on pin 6 (PB1) is the only other connection necessary.

The example program, written in Assembler is just 15 lines long! With a program, this short comments are almost superfluous but are included for clarity. The code can be downloaded from the Elektor website [1]. The program only needs to initialize the timer which then runs independently of processor control to output the clock signal. The processor can then be put into sleep mode to conserve power. With only 1% of the program memory used up the remaining 99 % is free for use for other tasks if required. The OSCCAL register contains a calibration byte which allows some adjustment of the CPU clock. This gives a certain degree of fine tuning of the output frequency. A recommendation in the Atmel data sheet indicates that the CPU clock frequency should not be greater than 1.75 MHz otherwise timer operation cannot be guaranteed.

The more recent ATtiny45 can be substituted for the ATtiny15. In this case, the CKSEL fuses should be set to put the chip’s Timer 1 into an ATtiny15-compatible mode [3]. After adjustment to the program, it will now be possible to obtain a higher (or more exact) frequency from the timer, the ATtiny45’s PLL can operate up to 64 MHz.


[2] documents/doc1187.pdf

[3] documents/doc2586.pdf


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