LCD-LED Display

Pulse Edge Visualiser Schematic Circuit Diagram

Ensuring LED Visibility with Digital Signals

For an LED to be effectively monitored, a digital signal must possess a minimum duration. Brief pulses lead to rapid LED flashes, often too quick for our relatively slow visual perception. To address this, a simple supplementary circuit is introduced here. Comprising merely four two-input NAND gates (in the form of a 74HC(T)132), along with two resistors, a diode, and a capacitor, this circuit works to elongate short pulses. By utilizing this circuit, even brief pulses can be extended sufficiently to enable clear recognition through an LED.

Pulse Edge Visualiser Schematic Circuit Diagram

Preparing Circuit for Subsequent Pulse Edge

The output level at pin 8 plays a crucial role in priming the circuit for the upcoming pulse edge. If a logic ‘1’ is present, capacitor C1 charges fully, causing gate 1a’s output to go low. Consequently, IC1b’s output and pin 9 of IC1c become high. The high level on pin 8, transmitted to IC1d via D1, overrides the low level on pin 3 (through R2), resulting in a high level at pin 12 of IC1d. This configuration remains stable only when the input signal is high.

Handling Low Input Levels

Conversely, when a low level is at the output, the capacitor discharges, causing IC1a’s output to go high. This change makes pin 9 and pin 12 also high, with D1 blocking. This state is stable only as long as the input signal remains low.

Response to Input Signal Changes

The dynamics shift when the input signal level changes. Upon a positive or negative pulse edge, the level at either pin 9 or pin 12 momentarily drops while the other pin maintains its state. Consequently, the output level changes in the same direction as the input signal. Subsequent level changes have no impact until pin 9 and pin 12 both turn high, which occurs after a specified interval determined by the values of R1 and C1 (in this case, several hundred milliseconds). During this ‘dead time,’ input level changes do not affect the output.

Compact and Versatile Application

This circuit’s simplicity and compactness make it suitable for various applications such as debouncing pushbutton switches or handling digital signals. In these scenarios, it can be easily incorporated into the signal path, providing efficient performance. Additionally, it can be seamlessly integrated into the enclosure of a logic tester. Utilizing a high-efficiency LED enhances visibility even for brief pulses. Notably, the circuit exhibits minimal current consumption, approximately 9 mA on average, especially when the input level is low. In this condition, only the gate input current and diode leakage current pass through R2.

Optimizing Current Flow and Power Savings

Under different circumstances, a significantly higher current travels through pin 8, D1, and R2 to pin 3. This behavior can be reversed effortlessly by swapping D1 and R2. Further power efficiency can be achieved by replacing D1 and R2 with a genuine OR gate. With this modification, the circuit can be perpetually connected to a power source, eliminating the need for an on/off switch.

Considerations for Power Source and IC Parameters

It’s essential to power the pulse edge visualizer from the circuit being tested, primarily due to the logic level values. Careful attention must be given to the switching speed (HC or HCT) and the thresholds of the ICs employed to ensure compatibility and seamless operation.


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