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Simple IR Receiver Schematic Circuit Diagram

This circuit has been designed to complement the ‘Simple IR Transmitter’ and to decode its transmitted signals. The similarity to the transmitter can be clearly seen: the received data is decoded by a shift register (74HC4094), which again is clocked by a counter/oscillator (74HC4060). The receiver is started by the first edge from the IR-receiver module, which triggers monostable IC5a. The output of the module is active-Low, so the negative trigger input is used. The monostable used is a 74HC4538, which is re-triggerable. By connecting the Q-output to the positive trigger input, IC5 is prevented from being triggered whilst it has an active output.

Simple IR Receiver Schematic Circuit Diagram 1

Simple IR Receiver Schematic Circuit Diagram 2

Simple IR Receiver Schematic Circuit Diagram 3

When IC5a is active, the Q output clears the reset input of IC4, thereby enabling it. The oscillator is again tuned to 36 kHz, making the clock from Q3 of the 4060 to the shift register run almost synchronously with the clock of the transmitter. By tying the strobe and output-enable of IC3 to logic ‘1’, the internal latch becomes transparent and its outputs are always enabled. The received pulses are inverted by IC2, as otherwise outputs 5/6/7 would be active low. At first sight outputs, 1/2/3/4 could have been simply connected to the other outputs. Instead, these four outputs are fed to a 4-to-16 demultiplexer, making sure that there can never be more than one active output. In case of the ‘Switchbox for Loudspeakers’, when several amplifiers are connected to a loudspeaker, there can never be a short circuit, or conversely, an overload of the amplifier. For this reason, the ‘inhibit’ is also connected to the output of IC5a, stopping any transient pulses from appearing at the outputs during the clocking in of the data and giving time for the relay contacts to release before another relay is activated (break-before-make).

The pulse-width of monostable IC5a is slightly longer than that required to deal with the data (3.9 ms). Depending on the relays used, it may be advisable to increase this time a little (by increasing the value of R4). This time has to be greater than the difference between the operate and release times. Normally the release time is less than the operating time but better safe than sorry. Signal Q3 from IC4 is inverted by IC2b, causing the data to be clocked halfway through the period that a bit is active. The four outputs of the demultiplexer are therefore suitable for the ‘Switchbox for Loudspeakers’ or the ‘Audio/VideoSwitch’, which can also be found in this issue.

In standby mode, this circuit has a current drain of only 3 mA. The resistors in series with the outputs are there for protection against an overload or short circuit. When the receiver is used to drive the ‘Audio/Video-Switch’, The output voltage drops to 4.2 V when three boards are driven in parallel, which is still sufficient to activate the relays. When more boards are driven in parallel, for example, six are required for 5.1 surrounds, then the values of R5-R8 should be at least halved.


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