This article provides a step-by-step guide on creating a simple 0-5V voltmeter using the 8051 microcontroller. Although this digital voltmeter has a sensitivity of just 200mV, its purpose is to demonstrate the interfacing of an ADC (Analog-to-Digital Converter) and a seven-segment display with the 8051 microcontroller, allowing for a digital readout of the input voltage.
It’s worth noting that a more advanced 3½-digit voltmeter project will be available in the near future. In this current project, we utilize the ADC0804 for analog-to-digital conversion and the AT89S51 microcontroller for control and display.
Before embarking on this particular project, it’s advisable to review two essential prerequisites: “Interfacing an ADC to an 8051” and “Interfacing a seven-segment display to an 8051.” This will provide you with a comprehensive understanding of the fundamental concepts involved.
Circuit diagram.
About the circuit.
The ADC’s Vref/2 (pin9) is left open in this design, which implies the input voltage range is 0 to 5V and the step size is 5/255 = 19.6mV. Dout = Vin/Step size is the equation for the ADC0804’s digital output. For a 1V input voltage, the digital output will be 1/19.6mV = 51, which is the binary equivalent of 51, which is 00110011. The ADC’s digital output is connected to the microcontroller’s pin P1.0. The P3.7, P3.6, P3.5, and P3.4 pins of the microcontroller provide control signals for the ADC, namely CS, RD, WR, and INTR. The microcontroller’s Port0 is connected to a two-digit multiplexed seven-segment display.P3.2 and P3.1 of the microcontroller provide control signals for the display driver transistors Q1 and Q2. A debouncing reset circuitry is formed of push button switch S1, capacitor C2, and resistor R10.
Program.
ORG 00H
MOV P1,#11111111B
MOV P0,#00000000B
MOV P3,#00000000B
MOV DPTR,#LABEL
MAIN: CLR P3.7
SETB P3.6
CLR P3.5
SETB P3.5
WAIT: JB P3.4,WAIT
CLR P3.7
CLR P3.6
MOV A,P1
MOV B,#10D
DIV AB
MOV B,#2D
MUL AB
MOV B,#10D
DIV AB
SETB P3.2
ACALL DISPLAY
MOV P0,A
ACALL DELAY
MOV P0,#10000000B
ACALL DELAY
MOV A,B
CLR P3.2
SETB P3.1
ACALL DISPLAY
MOV P0,A
ACALL DELAY
CLR P3.1
SJMP MAIN
DELAY: MOV R3,#02H
DEL1: MOV R2,#0FAH
DEL2: DJNZ R2,DEL2
DJNZ R3,DEL1
RET
DISPLAY: MOVC A,@A+DPTR
RET
LABEL: DB 3FH
DB 06H
DB 5BH
DB 4FH
DB 66H
DB 6DH
DB 7DH
DB 07H
DB 7FH
DB 6FH
END
About the program.
The program initiates by instructing the ADC to produce a digital output that corresponds to the input voltage. Subsequently, P1.0 scans this digital output and loads it into the accumulator. The value in the accumulator is then divided by 10 to remove the last digit. For example, if the input voltage is 4 volts, the ADC’s corresponding digital output would be 204D (where ‘D’ denotes decimal). After dividing by 10, the value left in the accumulator is 20D, which is then multiplied by 2D, resulting in 40D.
The program’s subsequent objective is to manipulate the value 40D to display a readout of 4.0 on the screen. To achieve this, the value 40D is once again divided by 10D. This operation places a value of 4 in the accumulator and 0 in the B register. The program then utilizes a lookup table to retrieve the digit drive pattern for the number 4, which is subsequently sent to Port 0, activating Q1.
Following a 1 ms delay, the binary pattern 10000000B is loaded onto P0, accounting for the decimal point. Q1 is deactivated after another 1 ms delay, and the content of B (which is 0) is shifted to A. The correct digit drive pattern for 0 is retrieved using the lookup table, placed on Port 0, and Q2 is activated. After an additional 1 ms delay, Q2 is deactivated, and this cycle repeats as needed.
